Processor system and method for reducing power consumption in idle mode

The processor system of the present invention supplies a power supply voltage of the low-idle level than the normal level during the idle mode to the processor. Therefore, the power consumed by the processor are minimized during the idle mode. Further, sikidoe increase the power supply voltage supplied to the processor when it returns from the idle mode to the normal mode to a normal level, by lowering the frequency of the clock signal that is the power supply voltage is supplied to the processor until the fully raised to the top level higher than the normal frequency of the processor to prevent malfunction.