Low-complexity architecture for AR(1) inference
2020
In this Letter, the authors propose a low-complexity estimator for the correlation coefficient based on the signed AR ( 1 ) process. The introduced approximation is suitable for implementation in low-power hardware architectures. Monte Carlo simulations reveal that the proposed estimator performs comparably to the competing methods in the literature with maximum error in order of 10 − 2 . However, the hardware implementation of the introduced method presents considerable advantages in several relevant metrics, offering more than 95% reduction in dynamic power and doubling the maximum operating frequency when compared to the reference method.
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