DESIGN OF HIGH PERFORMANCE AND FUNCTIONAL VERIFICATIONOF DSP BOARD USING VLSI ARCHITECTURE

The Field programmable gate arrays is used for many applications such as designing of Digital signal processing boards (DSP) and Application Specific integrated circuits (ASICs). Design of high performance and complex functionalities of boards are increasing computation cost and time consuming. In this paper, we provide functional verification of DSP board with high performance using Verilog Hardware description language architecture model. This is an automated and self functioning mode with complex functionalities. This work discuss about functional verification of DSP board using VLSI and Matlab. We can reduce and change number register and critical parallel input/output operations. This is pipeline based model so easily change the stage and adopt for any mathematical operations. The architecture is verified by existing functionalities and working environment