SPICE lumped circuit subcell model for the Discontinuous Galerkin Finite Element Time-Domain method

A SPICE lumped circuit subcell model is formulated within Discontinuous Galerkin Finite Element Time Domain (DGFETD) method. The lumped circuit port is designed to handle the interaction between the SPICE circuit solver and the DGFETD field solver. Three test models including LC filter, RLC network and a diode detector are simulated for the validation of the presented method.