Layer stripping method in chip failure analysis process

The invention relates to a layer stripping method in a chip failure analysis process. The layer stripping method comprises the following steps: (1) providing a chip having a multi-layer structure and comprising at least one target analysis layer, wherein the target analysis layer comprises a region to be analyzed; (2) carrying out layer stripping treatment to the surface of the chip by ion beams to remove one or more layers above the target analysis layer to expose the region to be analyzed, wherein the ion beams comprise at least one broad-beam ion beam, and the diameter of a beam spot is not less then 1mm. According to the layer stripping method, at least one broad-beam ion beam is used to acquire a uniform stripping layer processing surface, the damage of the single high-intensity focused ion beam to the target analysis region due to irradiation on the surface of the chip directly is avoided, the stripping precision is effectively improved, the processing range is expanded and the stripping efficiency is high.