Range extension of second order digital phase locked loop

Phase error dynamics of a second order Digital Phase Locked Loop (DPLL) have been studied using digital computers. Ranges of initial conditions leading to the phase locking condition were determined from the real time simulation of a second order DPLL in a digital computer. Hence the frequency acquisition range (FAR) of the loop was determined. At the same time ranges of initial conditions leading to the diverging condition of the loop were determined from the same simulation. Lyapunov exponents were examined, for very large number of possible values of the state variables in its entire range, for different input signal frequency. In the diverging zone of the loop the Lyapunov exponents are positive. Using these observations a scheme has been proposed to extend the FAR or the lock range of the DPLL.