Effects of Back-Gate Bias on the Mobility and Reliability of Junction-Less FDSOI Transistors for 3-D Sequential Integration

Low thermal budget junction-less transistors with back-gate are fabricated as top-tier devices for 3-D sequential integration. The impact of back-gate bias on carrier mobility and bias temperature instability (BTI) reliability is investigated. The back-gate bias is shown to modulate the carrier mobility: specifically, mobility is increased under forward back-gate bias (FBB), which is ascribed to the carrier redistribution from the front-gate interface toward back-gate interface. Regarding BTI reliability, if a back-gate bias ( ${V}_{\text {BG}}{)}$ is applied only during ON-state and a constant front-gate stress ${V}_{\text {G}}$ is used, BTI reliability is not influenced by the applied ${V}_{\text {BG}}$ (due to its negligible impact on the front-gate oxide field, ${E}_{\text {ox}}{)}$ . Therefore, supplying an FBB during ON-state can be used to adjust device performance—as ${V}_{\text {BG}}$ modulates the channel current through ${V}_{\text {th}}$ and mobility—without reliability penalty. On the other hand, if the back-gate bias is applied during both ON- and OFF-states, while a constant stress ${V}_{\text {ov}}$ is maintained by adjusting the front-gate ${V}_{\text {G}}$ [i.e., ${V}_{\text {G}}$ – ${V}_{\text {th}}{(}{V}_{\text {BG}}{)}$ is kept constant under different ${V}_{\text {BG}}$ ’s], the BTI reliability can be improved under FBB (due to a reduced ${E}_{\text {ox}}$ in the front-gate) without performance loss. The latter property can be used to improve the device reliability under circuit operation.