Reconfigurable hardware implementation of host-based IDS

Host-based IDS installed individually to each host computer has been useful to supplement network-based IDS (intrusion detection system). However, host-based IDS so far developed lacks real-time response due to software implementation, and thus it has poor ability to dynamically analyze packet. In order to add the ability of real-time response with strong security, we have proposed the hardware implementation of host-based IDS built into NIC (network interface card). The hardware of host-based IDS has been designed by using wave-pipeline technique and implemented by using reconfigurable hardware, FPGA (field programmable gate array). This has achieved the fairly high speed of 400MHz that supports 1-Gbps bandwidth by processing a few bits in parallel on to-day's major bit-serial Ethernet.