Low-power implementation of a Comb decimation filter for Delta Sigma analog-to-digital converters

In this paper, we present a low-power implementation of a Comb filter for Delta Sigma analog-to-Digital Converters. The circuit is based on a multistage architecture instead of typical recursive algorithm. Polyphase decomposition in the first stage is used to reduce unnecessary operations. A LUT based method is used for the first stage which greatly reduce the circuit complexity and make it possible to perform higher decimation factors at the input of the first stage. The LUT is partitioned to several small parts to reduce area. Compared with circuits implemented based on recursive algorithm, the circuit consumes lower power. Compared with other implementation method based on the same architecture, it consumes almost same power but can work at higher speed. Besides, it is easy to design and verify for Comb filters with different parameters.