Demonstration of integrated micro-electro-mechanical switch circuits for VLSI applications

Due to transistor leakage, CMOS circuits have a well-defined lower limit on their achievable energy efficiency [1]. Once this limit is reached, power-constrained applications will face a cap on their maximum throughput independent of their level of parallelism. Avoiding this roadblock requires an alternate switching device with steeper sub-threshold slope—i.e., lower V DD /I on for the same I on /I off [2]. One promising class of such devices with nearly ideal I on /I off characteristics are electro-statically actuated micro-electro-mechanical (MEM) switches [6]. Although mechanical movement makes MEM circuit delay significantly larger than that of CMOS, we have recently shown that with optimized circuit topologies MEM switches may potentially enable ∼10x lower energy over CMOS at up to ∼100MHz frequencies [3].