네트워크-온-칩을 위한 동적 메모리 관리 방식의 패킷 버퍼

Many network-on-chip (NoC) architectures suffer from huge buffering overhead. Thus, it is important to minimize buffer resources by carefully optimizing buffer architecture. In this paper, we present an outof-order NoC buffer architecture for variable length packets, which dynamically manages SRAM buffer allocation for lower overhead.