Structure of outside emitter silicon bipolar transistor (OSET) for high-speed LSI

Transistor structures suitable for high-speed bipolar LSIs have been examined and OSET (outside emitter technology) transistors which enable an emitter region more than three times larger for the same base area are proposed. The feature of this transistor is the structure where the base contact region is placed in the center and a ring-shaped emitter region is formed around it. As a result, the placement of the base and emitter regions is reversed compared to the conventional structure. With the OSET transistor with a ring-shaped emitter region formed by a self-aligned technology as a basis, a simple type with a simplified fabrication process, a ringed-collector type with a ring-shaped collector electrode outside the emitter to reduce the collector resistance and the area, and a central-collector type which has a minimum active area have been examined. The central-collector type transistor enables an emitter area of 2.6 μm2 in the device area of 2 × 2 μm2, and the emitter occupies an extremely high portion of the device region. The OSET transistor that enables a dramatic reduction of parasitic capacitances (which occupy a large portion of the LSI delay time) with device scaling is considered suitable for ultrahigh-speed LSIs.