Thermal management of the through silicon vias in 3-D integrated circuits
2019
The through silicon via technology is a promising and preferred way to
realize the reliable interconnection for 3-D integrated circuit integration.
However, its size and the property of the filled-materials are two factors
affecting the thermal behavior of the integrated circuits. In this paper, we
design 3-D integrated circuits with different through silicon via models
and analyze the effect of different material-filled through silicon vias,
aspect ratio and thermal conductivity of the dielectric on the steady-state
temperature profiles. The results presented in this paper are expected to
aid in the development of thermal design guidelines for through silicon vias
in 3-D integrated circuits.
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