Nanoscale imaging of mobile carriers and trapped charges in delta doped silicon p–n junctions

Integrated circuits and certain silicon-based quantum devices require the precise positioning of dopant nanostructures, and hydrogen resist lithography can be used to fabricate such structures at the atomic-scale limit. However, there is no single technique capable of measuring the three-dimensional location and electrical characteristics of these dopant nanostructures, as well as the charge dynamics of carriers and trapped charges in their vicinity. Here, we show that broadband electrostatic force microscopy can be used for non-destructive carrier profiling of atomically thin n-type (phosphorus) and p-type (boron) dopant layers in silicon, and their resulting p–n junctions. The probe has a lateral resolution of 10 nm and a vertical resolution of 0.5 nm, and detects the capacitive signature of subsurface charges in a broad 1 kHz to 10 GHz frequency range. This allows the bias-dependent charge dynamics of free electrons in conducting channels and trapped charges in oxide–silicon interfaces to be investigated. Broadband electrostatic force microscopy can be used to non-destructively image n-type and p-type dopant layers in silicon devices with a lateral resolution of 10 nm and a vertical resolution of 0.5 nm.