Possible limitations on the operating voltage of silicon detectors in the inner tracker

In working out a realistic long-term scenario for the operational conditions for the innermost silicon layers, it is usually assumed that the upper safe margin for the reverse-bias voltage is around 200 V. Lifetime of the detectors, and consequently total cost of the tracker are directly related to this value. Using pixel test structures, manufactured by CSEM in the same technology as DELPHI pixel detectors, we performed a study of maximum tolerable bias voltages on nonirradiated detectors, and on detectors which have received different fluences of pions, protons and neutrons. A special test was also done with detectors, continuously irradiated on a testbench with a Sr source, at a rate about 13 krad/h.