A 20 MHz, CCITT requirements compatible, Discrete Cosine Transform

Recent evolutions in digital video processing and public image transmissions have led to a standard coding method. This method which is the discrete cosine transform has to meet the H261 standard requirements specified by the CCITT. For this purpose, we propose a dedicated processor for the 2 dimensionnal forward or inverse discrete cosine transform (FDCT or IDCT) for 8×8 block size. A double precision mode provides the FDCT and IDCT computation at a data rate of 20MHz according to CCITT requirements. An optimized mode for specific applications such as video disk storage allows to compute the FDCT and IDCT at a high speed data rate up to 27MHz. A full custom approach using a double metal 1.2? CMOS process with an optimized pipe-line architecture has been chosen to fullfill both speed and size constraints.