A Low Power 8 Bit Parallel A/D Converter with High Accuracy Process

A high accuracy process offering small ΔVBE of pair transistors, small contact resistance, and uniform reference resistance, has been applied in the design of an 8 bit parallel 40 MHz A/D converter. A new bipolar structure produced by serial implantation of B+ and Ass+ through the same opening window of SiO2 has been developed to realize high speed and high uniformity. An optimized high speed comparator stage was developed in which the number of transistors and power consumption were reduced. Consequently, an 800 mW, 40 MHz sampling frequency, 8 bit A/D converter was developed.