New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack

Abstract Logic locking has emerged as a prominent technique to protect an integrated circuit from piracy, overbuilding, and hardware Trojans. Most of the well-known logic locking techniques are vulnerable to satisfiability (SAT) based attack. Though several SAT-resistant logic locking techniques such as Anti-SAT block (ASB) are reported that increase the time to decipher the secret key, the existing techniques are either vulnerable to signal probability skew (SPS) based removal attack or require significant design overhead. Therefore, a new lightweight ASB design and obfuscation technique is proposed that effectively integrate and obfuscates the ASB in the design to thwart removal attack. We first propose a new ASB design/integration approach that effectively thwarts the structural/functional analysis based removal attack with minimum overhead. Further, we also propose an ASB obfuscation approach that shifts the inverter deep in the circuit using De Morgan's law and replaces an ASB gate with a key-gate to thwart SPS based removal attack. Moreover, a new algorithm is proposed that inserts the ASB in the locked design to achieve desired output corruptibility. Finally, a new INV/BUFF key-gate is proposed that constructs the ASB with reduced overhead over the XOR/XNOR. Experimental evaluation on ISCAS-85 benchmarks shows that our ASB design and obfuscation approaches, on an average, reduce area overhead by 25.5% and 22% respectively, and effectively prevent removal attack without reducing any security.