High-yield indium-based wafer bonding for large-area multi-pixel optoelectronic probes for neuroscientific research

This paper reports on the optimization of wafer-scale bonding of micro-light-emitting diodes (µLEDs) on 4-inch sapphire wafers onto silicon (Si) substrates using an indium-gold (In-Au) reflow process. The bonding yield was optimized from initial values below 10 % to 100 % by applying a systematic variation of the two most relevant bonding parameters, namely the indium (In) bonding pad height alt;iagt;talt;/iagt;alt;subagt;2alt;/subagt; and the relative bonding area alt;iagt;Qalt;/iagt;. The fabrication process is designed to produce optoelectronic probes carrying arrays of µLEDs dedicated for applications in neuroscientific research applying optogenetic methods. The 6-µm-thick µLEDs comprise a gallium nitride layer epitaxially grown on sapphire wafers and lithographically patterned using reactive ion etching into µLEDs with lateral dimensions down to 20 × 20 µmalt;supagt;2alt;/supagt;. The µLEDs are transferred onto Si substrates carrying interconnecting tracks and bonding pads made of gold (Au). Two technological challenges were successfully addressed. The first is to pattern thick In layers with lateral dimensions down to 10 × 10 µmalt;supagt;2alt;/supagt; on top of the 6-µm-high µLED mesas. The second results from residual thermomechanical stress after wafer bonding due to the thermal expansion mismatch of sapphire and Si. It is demonstrated that the stress induced rupture of the In-Au bond interface between sapphire and Si is completely suppressed for alt;iagt;talt;/iagt;alt;subagt;2alt;/subagt;,alt;iagt;Qalt;/iagt; combinations with alt;iagt;talt;/iagt;alt;subagt;2alt;/subagt; ≥ 3 µm and alt;iagt;Qalt;/iagt; ≥ 15 %. These results enable fully functional two-dimensional arrays with 12 × 12 µLEDs to be realized on 65-µm-thin Si substrates.