Asymmetric Anti-Halo-field effect transistor and method for its preparation

A method of forming an integrated circuit structure, the method comprising: Implanting a first compensation implantation in a substrate that extends into the substrate to a second depth; Patterning a mask on the first compensation implantation into the substrate, wherein the mask includes an opening that exposes a channel position of the substrate; Implanting a second compensation implantation in the channel position of the substrate through the opening at an angle that is offset from the perpendicular to an upper surface of the substrate, wherein the second compensating implant is positioned in relation to an opposite second side of the channel position closer to a first side of the channel position and the second compensating implant comprises a material having the same doping polarity as a semiconductor channel implant extending into a substrate to a first depth wherein the first depth is farther away in relation to the second depth from an upper surface of the substrate wherein the first compensating implant comprises a material having a different doping polarity as the semiconductor channel implant; Forming a gate conductor over the channel position of the substrate in the opening of the mask; Removing the mask, so that the gate conductor is left standing on the channel position of the substrate; and Implanting source and drain implantations into the source / drain regions of the substrate adjacent to the channel position.