FPGA-based implementation of electronic abacus using Altera DE2 board

The development of electronic abacus is to integrate the use of abacus along with electronic devices which offers better visualisation of the abacus operations. The main focus of this application is to assist the primary school students‟ in validating a fundamental arithmetic operation by using an abacus. The electronic abacus is developed by integrating an abacus, abacus decoder module and FPGA-based processor. DE2 115 is chosen as the development module and VHDL as main programming language. The arithmetic algorithm developed for the electronic abacus is limited to the computational of whole numbers only. The electronic abacus is operational in two modes, display mode and arithmetic mode. In the display mode, the abacus beads position at column 1 until column 7is displayed as numerical representation on the LCD screen. A computation of arithmetic operations with less than three operatorsare available in the arithmetic modewith the capability ofdisplaying the negative numerical and infinite value. The implementation of integrating an abacus with electronic devices will hopefullycontribute in the development of more lively and interesting teaching approach by using this ancient apparatus.