Scribe lane structure including via hole of pad arranged in sawing line

Disclosed is a scribe lane structure in which a pad having a via hole is arranged on a sawing line. The scribe lane structure comprises a semiconductor substrate; semiconductor chips disposed on the semiconductor substrate; and a scribe lane disposed between the semiconductor chips and including at least one rewiring pad for simultaneously testing the semiconductor chips. A sawing line of the scribe lane is disposed to pass a part of a conductive via hole of the rewiring pad.