Simulation and measurement of back side etched inductors
2010
Deep-silicon etching was applied to an inductor in a 0.25 µm SiGe:C BiCMOS process. Significant increase of quality factor was achieved. Different simulations of the inductor were done with a planar EM simulator. The way how to handle non-homogenous dielectrics in a planar EM simulator is shown. A good agreement between measurement and simulation can be seen. The effect of back side etching is well predicted by EM simulation.
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