High yield batch packaging of micro devices with uniquely orienting self-assembly

We demonstrate a high yield wafer level packaging technique for micro devices on the basis of uniquely orienting self-assembly with 2mm square diced silicon parts. Each silicon part has one hydrophobic thiolated gold face and one circular peg, offset from the center of mass, on the opposite face. A receptor site on an alignment template has a circular trap hole. The whole assembly process consists of five major steps: (1) bulk parts are oriented to face the same direction; (2) parts are palletized onto the alignment template; (3) parts are one-to-one distributed to receptor sites; (4) parts self-align to receptor sites with a unique in-plane orientation; and (5) parts are bonded to a chip carrier template. The experimental results indicate that step 1-4 have yields close to 100%. We skip step 5, a well established process widely used in the IC industry. This packaging strategy can be applied for any shape of silicon or non-silicon parts, and the assembly mechanism itself imposes no upper limit on the size of the assembly templates.