A DDS-Based Wait-Free Phase-Continuous Carrier Frequency Modulation Strategy for EMI Reduction in FPGA-Based Motor Drive

In AC motor drive, the fixed-frequencies harmonic components of output voltage and current from the inverter with fixed frequency pulse width modulation (FFPWM) usually lead to electromagnetic interference (EMI). The spread spectrum clock generation (SSCG) is a widely used solution of this problem. Adjusting the switching frequency to reduce EMI is one kind of practicable scheme among SSCG methods. About this scheme, usually, how to design an optimal modulation waveform is the research emphasis of scholars. However, apart from modulation waveform, the mode and quality of carrier is also important and can be improved. In most frequency modulation methods, due to the limitation of the conventional carrier generation mode, implement of new frequency instruction has to wait for the termination of last switching period. In order to eliminate the waiting state, this paper proposes a wait-free phase-continuous carrier frequency modulation strategy (WPCFM) by combining the DDS theory and proper temporal planning of control interruptions. Besides, theoretical analysis of WPCFM including quantization error, frequency jitter, phase delay and voltage distortion are finished. Moreover, compared with conventional methods, a more convenient, feasible and simpler field-programmable gate array (FPGA) based algorithm implementation method and the control structure of WPCFM are also introduced. Analysis shows that, although WPCFM causes a slight increase of the current ripple, it can solve the partial frequency nonuniform distribution problem of conventional method and it has potential value of applications in the wide band gap (WBG) motor drive systems. The effectiveness of the WPCFM is verified by several sets of EMI reduction experiments where classical periodic carrier frequency modulations are applied1.