Simultaneous Formation of Shallow Junctions and Gate Doping for Dual Gate Structures Using Cobalt Silicone as a Dopant Source
1999
The fabrication of high performance dual gate complementary metal oxide semiconductor (CMOS) devices has been demonstrated by dopant implantation into a self-aligned CoSi 2 layer, followed by a single drive-in annealing. By the optimization of polycrystalline Si (poly-Si) gate thickness and drive-in annealing conditions, it was shown that CMOS devices annealed at 900°C with gate poly-Si of 200 nm thickness gives simultaneous formation of shallow junction and gate doping for both n-channel MOS and p-channel MOS with a single drive-in annealing. CMOS devices fabricated with this technology exhibit good junction characteristics. In particular, there is no degradation from silicidation, implantation-induced damage, gate dopant depletion, or boron penetration. Also, high reliability of the gate oxide and low sheet resistance of CoSi 2 can be obtained. Therefore, it is suggested that simultaneous formation of shallow junction and gate doping using Co silicide as a dopant source is a promising technique for the fabrication of high performance dual gate CMOS devices.
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