A 37 ppm/°C Temperature Compensated CMOS ASIC with ±16 V Supply Protection for Capacitive Microaccelerometers
2007
A high reliability CMOS-MEMS hybrid microaccelerometer system is presented. To enhance the temperature response and to minimize die-to-die variations, a low-noise continuous time front-end architecture with temperature compensation and parasitic cancellation is proposed. The temperature coefficients of the output bias and the scale factor are measured to be 37 ppm/degC and 27 ppm/degC, respectively. The bias instability level of the system is measured to be 42 mug. The integrated +16 V power supply protection block gives the enhanced system reliability and reduced form-factor.
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