Reusable generic design patterns for mixed-criticality systems based on DREAMS

Abstract Multi-core mixed-criticality systems are complex solutions that provide benefits regarding lower power consumption, size, weight and cost and better performance and scalability, compared with single-core architectures. However, these systems where virtualization mechanisms such as hypervisors are used for integrating functionalities with different criticality levels into the same hardware platform and where on-chip and off-chip communication systems are implemented for communicating, imply certification challenges due to their complexity. Those challenges to certification are supported by the fact that today’s safety-related standard focus on single computing systems where spatial and temporal interferences are quite probable. Multi-core architectures enable sharing resources (e.g., cache memory, I/Os) between more than one processor at the same time, facilitating the appearance of interferences which may hinder the achievement of the spatial and temporal independences. This paper analyses the certification challenges in mixed-criticality systems and identifies some reusable generic solutions to overcome those challenges. The solutions presented in this paper are integrated into a safety wind turbine system that follows the design style introduced in European project DREAMS.