Modelling Thermally-Induced Mechanical Faults in Power Integrated Circuits Assemblies

The structure of a Double Diffused Metal-Oxide-Semiconductor (DMOS) device is complex and consists of multiple routing metallization layers interconnected through vias embedded in Silico Dioxide (SiO2). The predominant failure mechanisms that occur after a large number (e.g. 106) of active cycles are the crack formation between two adjacent signal metal lines and/or delamination of power metal plates from the SiO2 layer. Numerical simulation of power IC's based on finite element analysis is one of the most used simulation tools for the defect risk assessment. A novel subdivision method combined with the homogenization and nonconformal mesh of computational structure is applied to the model to efficiently simulate the complex IC structures. Results are assessed on a commonly DMOS layout substructure.