Low Cost and Highly Manufacturable MOL/BEOL Constructs in 22FDSOI Technology for High Performance and Low Power Applications

A highly optimized 22FDSOI Logic Architecture for Power, Performance, Area (PPA) and cost is presented in this paper. Unique features of FDSOI technology including channel strain based PFET transistor performance enhancement are further advanced with innovative low cost MOL/BEOL based special constructs. The new constructs allow a highly optimized 8T-CNRX library design. Based on this architecture, PPA advantage is demonstrated over competing bulk and FinFET technologies. This Logic Architecture offers FinFET like performance with 28nm bulk like simple MOL and cost structure.