Packaging effect investigation of CMOS compatible pressure sensor using flip chip and flex circuit board technologies

Abstract In this study, a novel piezoresistive pressure sensor, using flip chip and flex circuit packaging technologies with spacer, is employed to substitute the conventional chip on board or small outline package (SOP) packaging technology. The performance of this novel packaging pressure sensor is compared with the conventional one to demonstrate the feasibility of this novel design. To achieve this object, a finite element method (FEM) is adopted for the sensor performance evaluation, and the thermal and pressure loading is applied on the sensor to study the output signal sensitivity as well as the packaging-induced signal variation. The results show that this novel packaging design not only maintains qualified sensor signal sensitivity but also reduces the packaging-induced thermal effect of the pressure sensor. Furthermore, in order to achieve better sensor performance, a FEM parametric analysis is performed. The design parameters include silicon membrane size, flex circuit board thickness and glass layer material. The findings show that a thinner silicon membrane thickness can enhance the sensor signal sensitivity, and a glass layer with a coefficient of thermal expansion (CTE) closer to that of silicon, can reduce the packaging-induced thermal effect.