A fast efficient architecture for MPEG-4 zerotree encoder

This paper presents a novel architecture of MPEG-4 zerotree encoder. Under the architecture, a fast technique of label coefficients is proposed to reduce the recursive scan. It is achieved by exploiting the feature of the MPEG-4 zerotree symbol alphabet. A new combined structure of ZTR address buffer and the significant flag bit is described. It can simplify the skipping of the significant coefficients and locating the descendent coefficients of ZTR/VZTR. Furthermore, a preprocessor is given for independent encoding of each tree in individual bitplane.