Integer word-length optimization for fixed-point systems

Time-to-market and implementation cost are high-priority considerations in the automation of digital hardware design. Nowadays, digital signal processing applications are implemented into fixed-point architectures due to its advantage of manipulating data with lower word-length (WL). Thus, floating-point to fixed point conversion is mandatory. However, this conversion is translated into optimizing the integer word length (IWL) and fractional word length (FWL). Optimizing the IWL can significantly reduce the cost when the application is tolerant to a low probability of overflows. In this paper, we propose a new IWL optimization algorithm that exploits selective simulation technique to reduce both the implementation cost and optimization time. The efficiency of the algorithm is illustrated through experiments, where 17 to 22 % of cost reduction with respect to interval arithmetic and acceleration factor up to 617 with respect to classical max-1 algorithm are reported.