An original design of MOSFET/IGBT gate circuit layout to suppress power/drive interaction

1998 
The common impedance coupling between power and drive circuit is at the origin of many problems in power converters (Electromagnetic Compatibility (EMC), losses,…). Classically in power modules the solution lies in providing another pin for emitter, this can reduce the common impedance effects, but is limited by geometrical constraints. In this paper, another solution is proposed in order to entirely cancel power/drive interaction. Taking into account all mutual effects in the module, this aim can be achieved by a specific geometry of gate layout. First, voltage induced in the gate circuit due to current variations is quantified, then a layout for gate circuit is deduced from the previous analysis. It will be shown that all influences of power current on the gate circuit can be eliminated by the proposed design. Experimental and simulation results are presented for validation.
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