Check node updating circuit and method of LDPC (low-density parity-check) decoder

2012 
The invention discloses a check node updating circuit and method of an LDPC (low-density parity-check) decoder. The check node updating circuit comprises a decomposition circuit, a subtraction circuit, a sign bit and data bit decomposition circuit, a data evaluation circuit, a sign bit processing circuit and a merging circuit. The check node updating circuit disclosed by the invention is based on 1/2 code rate LDPC codes used in the China Mobile Multimedia Broadcasting standard, and the decoding method adopts a layered min-sum algorithm and is based on a minimum value and second smallest value calculation algorithm of a pointer. The check node updating circuit disclosed by the invention is low in implementation complexity and few in used hardware resources, and can be used for saving the number of comparators and preventing excess information from being generated.
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