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A 250MHz 18Mb Full Ternary CAM with 0.3V Match Line Sense Amplifier in 65nm CMOS
A 250MHz 18Mb Full Ternary CAM with 0.3V Match Line Sense Amplifier in 65nm CMOS
2013
Hayashi Isamu
Amano Teruhiko
Watanabe Naoya
Yano Yuji
Kuroda Yasuto
Shirata Masaya
Dosaka Katsumi
Nii Koji
Noda Hideyuki
Kawai Hiroyuki
Keywords:
Sense amplifier
Log amplifier
Ternary operation
Electronic engineering
CMOS
Engineering
Input offset voltage
voltage down converter
match line
Correction
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