Split Parallel Semi-Bridge Switching Cells for Full-Power-Range Efficiency Improvement

This paper proposes a positively-coupled-inductor (PCI) based paralleling scheme for semi-bridge switching cells which are formed by power MOSFETs and diodes. Both the semi-bridge switching cell and the inductor are split into two parallel parts, and thus, a small differential-mode inductance is formed between the midpoints of the parallel semi-bridge switching cells. A time-delay-based modulation strategy is applied to generate a controllable circulating current which enables all active switches to achieve the zero-current switching (ZCS) or zero-voltage switching (ZVS), and all diodes to achieve ZCS turn-off. Accordingly, the switching loss and the reverse-recovery loss can be significantly reduced. The operating principle of the proposed paralleling scheme is characterized by two complementary operation modes: desynchronized mode with soft-switching (lower switching loss) and synchronized mode with lower conduction loss. Compared with conventional soft-switching schemes, this solution features zero auxiliary switches, constant switching frequency, and improved full-power-range efficiency enabled by the dual operation modes. Furthermore, design guidelines of the PCIs are presented where a novel winding arrangement is proposed and verified to obtain a controllable differential mode (DM) inductance. The operation principles and advantages of the proposed paralleling structure are comprehensively validated on both Buck and Boost dc-dc converters with both Si and SiC power MOSFETs and diodes.