Germanium n-Channel Planar FET and FinFET: Gate-Stack and Contact Optimization

We demonstrate Ge enhancement-mode nMOS FinFETs fabricated on 300-mm Si wafers, incorporating an optimized gate-stack (interface trap density $D_{\mathrm{ it}}$ below $2 \times 10^{11}$ eV $^{-1}\cdot {\mathrm{ cm}}^{-2})$ , n + -doping (active doping concentration $N_{\mathrm{ act}}$ exceeding $1 \times 10^{20}~{\mathrm{ cm}}^{-3})$ , and metallization (contact resistivity $\rho _{c}$ below $2 \times 10^{-7}\Omega \cdot {\mathrm{ cm}}^{2})$ modules. A new circular transmission line $\rho _{c}$ extraction model that captures the parasitic metal resistance is proposed. At a supply voltage $V_{\mathrm{ DD}}$ of 0.5 V, 40-nm-gate-length FinFET devices achieved an ON-performance $I_{\mathrm{\scriptscriptstyle ON}}$ of 50 $\mu \text{A}/\mu \text{m}$ at an OFF-state current $I_{\mathrm{\scriptscriptstyle OFF}}$ of 100 nA/ $\mu \text{m}$ , a subthreshold swing $S_{\mathrm{ sat}}$ of 124 mV/decade, and a peak transconductance $g_{m}$ of 310 $\mu \text{S}/\mu \text{m}$ . The same gate-stack and contacts were deployed on planar devices for comparison. Both FinFET and planar devices in this paper achieved the highest reported $g_{m}/S_{\mathrm{ sat}}$ at $V_{\mathrm{ DD}} = 0.5$ V to date and the shortest gate lengths for Ge nMOS enhancement-mode transistors.