A 550-ps access, 900-MHz, 1-Mb ECL-CMOS SRAM

Summary form only given. An ultra-high-speed 1 Mb ECL-CMOS SRAM with 550 ps access time and 900 MHz operating frequency has been developed using 0.2 /spl mu/m BiCMOS technology. Three key techniques for achieving the high speed are a BiCMOS word driver with an NMOS level-shift circuit, a sense amplifier with a voltage-clamp circuit, and a BiCMOS write circuit with a variable impedance load of a bit line.