Simulations of FDSOI CMOS with Sharing Contact between Source/Drain and Back Gate
2011
In this paper, a new ultra-thin fully-depleted SOI CMOS structure with sharing contact between source/drain and back gate is presented to save area and increase threshold voltage tuning capability. TCAD simulations are used to investigate the back-gate effect on the ultra-thin SOI CMOS. A new process flow to make the fully-depleted SOI CMOS structures is also proposed.
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