Numerical Study of the VDMOS with an Integrated High-K Gate Dielectric and High-K Dielectric Trench

The VDMOS with an integrated high-k gate dielectric and high - k dielectric trench is investigated in this paper. The high-k (HK) dielectric is applied both for the gate dielectric and trench, which improves the performance without increasing the process complexity. First, HK dielectric trench makes the electric field distribution of the drift region more uniform, thus improving breakdown voltage (BV). Second, the HK dielectric trench assists the depletion of the drift region, thereby increasing the doping concentration of the drift region and decreasing the specific on-resistance (Ron, sp). Third, the HK gate dielectric decreases the threshold voltage (Vth) and increases the transconductance (gm) of the device. Simulation results show that the new VDMOS has a better breakdown, output, and conduction characteristics when compared to the sidewall HK dielectric VDMOS (SWHK VDMOS) and conventional VDMOS (Con VDMOS).