FPGA-based amplitude and phase detection in DLLRF

The new generation particle accelerator requires a highly stable radio frequency (RF) system. The stability of the RF system is realized by the Low Level RF (LLRF) subsystem which controls the amplitude and phase of the RF signal. The detection of the RF signal's amplitude and phase is fundamental to LLRF controls. High-speed ADC (Analog to Digital Converter), DAC (Digital to Analog Converter) and FPGA (Field Programmable Gate Array) play very important roles in digital LLRF control systems. This paper describes the implementation of real-time amplitude and phase detection based of the FPGA with an analysis of the main factors that affect the detection accuracy such as jitter, algorithm's defects and non-linearity of devices, which is helpful for future work on high precision detection and control.