Design and Analysis of Hybrid CMC DSTATCOM Control Topology for Mitigation of Load Current Harmonics

This paper demonstrates performance analysis of Distribution Static Compensator (DSTATCOM) system utilizing Cascaded-Multilevel Converters (CMCs). In view of the fact that the control topologies for the CMC-based DSTATCOM were more complex, a simplified decoupling control topology is proposed. In order to able to operate in a medium/high-voltage application, a huge number of DC capacitors are used. Earlier researches related to DC capacitor voltage-balancing techniques were extremely simple, in that individual voltage compensators are added into the main control loop. This technique potentially reduces the trustworthiness of the controller. The objective of this research is to design and realize high-performance less expensive power stages and controllers. To regulate and to balance the DC capacitor voltages, effective Space Vector Pulse Width Modulation (SVPWM) technique is used. The performance and accuracy of operation of the proposed CMC DSTATCOM model and control is implemented and analyzed in MATLAB/Simulink. The results are compared with various conditions and presented.