Experimental results of a recovery block scheme to handle noise in speech recognition systems

In this paper, we present the last improvements for a new approach to cope with noise that troubles speech recognition systems (SRS). This approach performs on-line monitoring and is oriented to hardware redundancy (it is essentially a modification of the classic recovery block scheme). When compared to conventional approaches using fast Fourier transforms (FFT) and Hamming code, the primary benefit of such a technique is to improve system performance when operating in real (i.e., noisy) environments. The second advantage is related to the considerably lower complexity and reduced area overhead required for implementation. We implemented three full versions of the proposed algorithm: one running on a PC microcomputer, and a second one slightly modified to run on a TMS-320C67 Texas DSP microprocessor module. Both of them were described in the C language. A last implementation was prototyped on a hardware/software development environment based on the same Texas microprocessor and on the FLEX10K20 FPGA Altera component.