A 10 MSample/Sec Digital Neural Spike Detection for a 1024 Pixels Multi Transistor Array Sensor
2019
This paper presents an FPGA implementation of a DSP performing real time spike detection on the electrical activity of an in vitro neuronal culture of rat hippocampi. The DSP enhances the Signal-to-noise ratio (SNR) of samples recorded by a 1024 pixels Multi Transistor Array (MTA) at 9375 Samples/Sec per pixel of $\sim 6\ \boldsymbol{\mu}\mathbf{m}$ pitch. The implementation integrates in the same system a Time Division Multiplexing (TDM) filter and a spatio-temporal correlation algorithm, to increase the SNR up to identify spikes as low as $215\ \boldsymbol{\mu}\mathbf{V}_{0-\mathbf{PEAK}}$ . The digital filter is a 2nd order high pass Infinite input response (IIR) Chebyshev filter. The spatio-temporal correlation exploits the MTA smaller pixels size and the high sample-rate to compute an equivalent pixel from a group of 7 pixels and 3 consecutive frames for a total of 21 samples and it is supported by a multi-channel noise power estimation. Finally, this paper shows the results achieved on the performed experiments and compares the system with others experiments using different sensors and algorithms.
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