Power minimization in CMOS RF mixers

Abstract:A new very low power RF mixer is introduced. The proposed mixer is based on twotechniques: A CMOS transistor pair is applied to the four cross-coupledcommutating transistor (the first technique), and current boosted technique, asdescribed in the paper. The CMOS mixer is simulated in 0.8 μm CMOS technology.The mixer has an input signal of 0.2V and operates on a single 2.5V supply withtransistor threshold voltages of 0.57V for all NMOS transistors and -0.52V for allPMOS transistors, and has a power dissipation of 2.3 mW.