Architectural exploration of heterogeneous NoC with fault tolerant capacity

The paper presents the exploration of the architecture and the transient fault effect analysis of heterogeneous NoC. Here we are analyzing various parameters such as throughput, latency and sink bandwidth considering traffic conditions, number of virtual channels, number of cores in router design Additionally, asynchronous architecture is also checked for glitch fault effect tolerance. With these analyses, ASRD(Asynchronous Router Design) is showing better results in terms of throughput and latency compared to SRD(Synchronous Router Design). It is also found to be with inherent fault tolerant potential because of handshaking alerts and about half of the infused faults get converted into new qualities before transforming into mistakes. Finally, our paper concludes from the result that asynchronous router design is more fault tolerable with proposed architecture.