AVX-512 Based, High-Throughput LDPC Decoders

Low Density Parity Check (LDPC) codes can approach the Shannon limit in digital communication systems and have good error correction performance. At present, with the continuous development of communication technology, the demand for the throughput of the communication system is also increasing. In order to further improve the throughput of the LDPC decoder, this paper uses the AVX512 instruction set based on the parallel structure of the LDPC codes decoding algorithm, and proposes a design scheme based on the layered OMS-LDPC decoding algorithm. This solution can be implemented on a general-purpose processor (GPP) and achieve higher throughput. The experimental results show that, in the case of 10 iterations, the decoder based on the X86 processor supporting AVX512 can reach a throughput of 53Mbps to 131Mbps.