Localized germanium-on-insulator patterns on Si by novel etching scheme in CF4/O2 plasma

We report here a novel etch process scheme developed to form the Ge structures used in forming localized Ge on insulator (GOI) substrates. The approach of simultaneous etching the Ge film and photo resist provided greater advantages such as eliminating the necessity of post etch strip process step thus reducing process complexities and cycle time, over the conventional etch scheme. Various issues, which have shown up in the conventional etching, were also overcome. The etch process schemes are fully CMOS compatible and can be easily adopted for creating local regions of Ge on Si for advanced CMOS applications.