Self-aligned PtSi fully silicided (FUSI) metal gates for 45 nm CMOS applications

We demonstrate a self-aligned Fully Silicided (FUSI) process for the integration of PtSi as metal gate for 45 nm CMOS applications. It is shown that when Pt FUSI structures are formed in oxygen ambient, a thin continuous SiO 2 film is formed along the Pt-silicide that effectively protects the FUSI structures during the selective metal wet etch. With the new process, capacitors and narrow gates with linewidth down to 37 nm are fabricated and electrically characterized. The effect of dopants on the work function of PtSi is also addressed.